Departments
Integrated CircuitsNeed Help
Home >
Integrated Circuits >
Microprocessors >
80 Series
8250A Datasheet
Photograph
Features
- Single Chip UART
- DC to 625k Baud (DC to 10MHz Clock)
- Crystal or External Input
- On-Chip Baud Rate Generator 1 to 65535 Divisor
- Proritized Interrupt Mode
- Fully TTL/CMOS Compatible
- Microprocessor Bus Oriented Interface
- Modem Interface
- Line Break Generation and Detection
- Loopback and Echo Modes
- Double Buffered Transmitter and Receiver
Pin Layout
Pin Description
| Pin Number | Description |
|---|---|
| 1-8 | D0-D7 - Data Bits |
| 9 | RCLK - 16x Baud Rate Clock Input |
| 10 | SER IN - Serial Data Input |
| 11 | SER OUT - Serial Data Output |
| 12 | CS0 - Chip Select |
| 13 | CS1 - Chip Select |
| 14 | CS2 - Chip Select (Active Low) |
| 15 | BAUDOUT - 16x Baud Output (Active Low) |
| 16 | XTAL1 - Crystal Input |
| 17 | XTAL2 - Crystal Input |
| 18 | DOSTR - Data Out Strobe (Active Low) |
| 19 | DOSTR - Data Out Strobe |
| 20 | GND - Ground |
| 21 | DISTR - Data In Strobe (Active Low) |
| 22 | DISTR - Data In Strobe |
| 23 | DDIS - Driver Disable |
| 24 | CSOUT - Chip Select Out |
| 25 | ADS - Address Select (Active Low) |
| 26-28 | A2-A0 - Register Select |
| 29 | NC - Not Connected |
| 30 | INT - Interrupt |
| 31 | OUT2 - Output 2 (Active Low) |
| 32 | RTS - Request to Send (Active Low) |
| 33 | DTR - Data Terminal Ready (Active Low) |
| 34 | OUT1 - Output 1 (Active Low) |
| 35 | MR - Master Reset |
| 36 | CTS - Clear to Send (Active Low) |
| 37 | DSR - Data Set Ready (Active Low) |
| 38 | DCD - Data Carrier Detect (Active Low) |
| 39 | RI - Ring Indicator (Active Low) |
| 40 | Vcc - +5V Positive Supply |
Dimensional Drawing
Technical Data
Datasheet
Application Notes