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81C55 2k CMOS Static RAM Datasheet
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Features
- 256 Words x 8-bits RAM
- Single Power Supply, 3V to 6V
- Completely Static Operation
- On-Chip Address Latch
- 8-bit programmable I/O Ports
- TTL Compatible
- RAM Data Hold Characteristic at 2V
- 6-bit Programmable I/O Port
- 14-bit Programmable Binary Counter/Timer
- Multiplexed Address/Data Bus
- Direct Interface with 80C85
Pin Layout
Pin Description
| Pin Number | Description |
|---|---|
| 1 | PC3 - Port C |
| 2 | PC4 - Port C |
| 3 | TIMER IN - Timer Input |
| 4 | RESET - Reset |
| 5 | PC5 - Port C |
| 6 | TIMER OUT - Timer Output (Active Low) |
| 7 | IO/M - Internal Memory Select |
| 8 | CE - Chip Enable (Active Low) |
| 9 | RD - Read (Active Low) |
| 10 | WR - Write (Active Low) |
| 11 | ALE - Address Latch Enable |
| 12-19 | AD0-AD7 - Address Data Bus |
| 20 | GND - Ground |
| 21-28 | PA0-PA7 - Port A |
| 29-36 | PB0-PB7 - Port B |
| 37-39 | PC0-PC2 - Port C |
| 40 | Vcc - Positive Voltage Supply |
Dimensional Drawing
Technical Data
