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24LC256 32kx8 Serial EEPROM Datasheet
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Product Details
- Cascadable for up to 8 Devices
- Low Power CMOS Technology
- 64-byte Page-Write Mode Available
- 2-wire Serial Interface Bus, I²C Compatible
- 1,000,000 Erase/Write Cycles
- Output Slope Control to Eliminate Ground Bounce
- 400kHz Compatibility
- Self-timed ERASE/WRITE Cycle including Auto-Erase
- Page-Write Buffer for up to 16 bytes
- 5ms Typical Write Cycle Time for Page Write
- Hardware Write Protect for Entire Memory
- Can be Operated as Serial ROM
- Data Retention > 200 years
Pin Layout
Pin Description
| Pin Number | Description |
|---|---|
| 1 | A0 - User Configurable Chip Select |
| 2 | A1 - User Configurable Chip Select |
| 3 | A2 - User Configurable Chip Select |
| 4 | Vss - Ground |
| 5 | SDA - Serial Address/Data I/O |
| 6 | SCL - Serial Clock Input |
| 7 | WP - Write Protect Input |
| 8 | Vcc - Positive Power Supply |
Dimensional Drawing
Technical Data
