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AD606 50MHz 80dB Demodulating Logarithmic Amplifier Datasheet
Photograph

Features
Logarithmic Amplifier Performance
- - 75 dBm to +5 dBm Dynamic Range
- - Low Input Noise
- - Usable to >50 MHz
- - 37.5 mV/dB Voltage Output
- - On-Chip Low-Pass Output Filter
Limiter Performance
- - ±1 dB Output Flatness over 80 dB Range
- - ±3° Phase Stability at 10.7MHz over 80 dB Range
- - ±Adjustable Output Amplitude
Low Power
- - +5 V Single Supply Operation
- - 65 mW Typical Power Consumption
- - CMOS-Compatible Power-Down to 325 µW typical
- - <5 µs Enable/Disable Time
Applications
- - Ultrasound and Sonar Processing
- - Phase-Stable Limiting Amplifier to 100MHz
- - Received Signal Strength Indicator (RSSI)
- - Wide Range Signal and Power Measurement
Pin Layout

Pin Description
Pin Number | Description |
---|---|
1 | INLO - Differential RF Input |
2 | COMM - Power Supply Common |
3 | ISUM - Log Detector Summing Node |
4 | ILOG - Log Current Output |
5 | BFIN - Buffer Input |
6 | VLOG - Buffered Log Output |
7 | OPCM - Output Common |
8 | LMLO - Differential Limiter Output |
9 | LMHI - Differential Limiter Output |
10 | LADJ - Limiter Level Adjustment |
11 | FIL1 - Offset Loop Low-Pass Filter |
12 | FIL2 - Offset Loop Low-Pass Filter |
13 | VPOS - Positive Supply |
14 | PRUP - Power Up |
15 | COMM - Power Supply Common |
16 | INHI - Differential RF Input |
Dimensional Drawing

Technical Data