Departments
Integrated CircuitsNeed Help
Home >
Integrated Circuits >
Microprocessors >
80 Series
80C52 Datasheet - 80C52 CPU with 256x8 RAM and I/O Datasheet
Photograph
Features
- Pin Compatible with NMOS 8032
- Power Control Modes
- 256 bytes of RAM
- 8 kbytes of ROM
- 32 programmable I/O Lines
- Three 16 bit Timer/Counter
- 64k Program Memory Space
- 64k Data Memory Space
- 6 interrupt sources
- Programmable Serial Port
Pin Layout
Pin Description
| Pin Number | Description |
|---|---|
| 1-8 | P1.0-P1.7 - Port 1 |
| 9 | RST - Reset |
| 10 | P3.0/RXD - Port 3.0 / Serial Receive Pin |
| 11 | P3.1/TXD - Port 3.1 / Serial Transmit Pin |
| 12 | P3.2/INT0 - Port 3.2 / Interrupt 0 (Active Low) |
| 13 | P3.3/INT1 - Port 3.3 / Interrupt 1 (Active Low) |
| 14 | P3.4/T0 - Port 3.4 / Timer 0 |
| 15 | P3.5/T1 - Port 3.5 / Timer 1 |
| 16 | P3.6/WR - Port 3.6 / Write (Active Low) |
| 17 | P3.7/RD - Port 3.7 / Read (Active Low) |
| 18 | XTAL2 - Crystal Input |
| 19 | XTAL1 - Crystal Input |
| 20 | Vss - Ground |
| 21-28 | P2.0-P2.7 - Port 2 |
| 29 | PSEN - Program Store Enable (Active Low) |
| 30 | ALE - Address Latch Enable |
| 31 | EA - External Memory Enable (Active Low) |
| 32-39 | P0.7-P0.1 - Port 0 |
| 40 | Vcc - Positive Supply |
Dimensional Drawing
Technical Data
